1. Field of the Invention
This invention is related to floating point units in processors and, more particularly, to handling subnormal numbers in floating point addition/subtraction operations.
2. Description of the Related Art
Floating point units providing hardware support for floating point computations are common in modern microprocessors. Usually, a floating point value is represented and manipulated as described in Institute for Electrical and Electronic Engineers (IEEE) standard 754 and related standards, although non-standard implementations of floating point units are used in some processors. While different precisions for floating point values are permitted, generally the representation comprises a sign bit, an exponent field, and a mantissa field (called the significand field in IEEE 754 standard implementations). The sign bit indicates whether or not the value is positive or negative (e.g. 0 is positive, 1 is negative). The exponent field indicates the power to which the base is raised to be multiplied by the mantissa of the value. In IEEE standard floating point arithmetic, the base is two. In IEEE standard floating point arithmetic, the exponent is biased by adding a constant value to the actual exponent to arrive at the exponent value stored in the exponent field. In this manner, the exponent is always a positive number, even though the exponents range from a negative number to a positive number. The lowest (negative) exponent and highest (positive) exponent depend on the precision. The lowest negative exponent typically has an absolute value that is one less than the highest positive exponent. The mantissa field comprises the mantissa portion of the value, excluding the implicit bit. The implicit bit is the most significant bit of the mantissa, the bit to the left of the binary point (i.e. the implicit bit is not explicitly included in the format, although a given implementation may explicitly store the implicit bit in the internal format used in that implementation's registers). For normal floating point numbers (those having exponents within the exponent range supported by the precision of the value), the implicit bit is a binary one. That is, the mantissa has a value is in the range between 1 (inclusive) and the base (exclusive). For subnormal floating point numbers (those having an exponent smaller than the smallest negative exponent in the range), the implicit bit is a binary zero. That is, the mantissa has a value between 0 (exclusive) and 1 (exclusive). The biased exponent value of zero is used to signify a subnormal floating point number (also referred to as a denormal floating point number). That is, the biased exponent value of zero is a signal, and is not the actual value of the exponent. The actual value of the exponent is the biased value of one, with an implicit bit of zero.
To perform floating point addition, the exponents of the two values to be added must be the same. Typically, the mantissa (including the implicit bit) of the value having the smaller exponent is right shifted by the number of bits equal to the difference in the exponents, effectively representing the mantissa at the higher exponent. Subnormal numbers are detected first, and then shift counts are generated.